Novel Transmitter IC Architecture That Enables >80GHz Analog Output Bandwidth

Researchers realized novel architecture for transmitter IC that has key building blocks fabricated in a mainstream SiGe BiCMOS process.

There is a growing popularity for data-intensive applications like cloud services, video streaming, high-performance computing and 5G. This demand fuels the need for high speed optical communication systems inside the data centers. Most optical links within the data centers work at speeds up to 400 Gb/s, using 4 100 Gb/s channels. Evolution in connectivity and big data is predicted to demand terahertz of frequencies. Therefore, co-packaged paradigms are emerging to help optical switches cope with the massive bandwidth density at their input. In these co-packaged paradigms, silicon based photonics transceivers are integrated with high speed electronic circuits.

One way to realize terahertz frequency capable transceivers is by pushing signaling rates well beyond 100Gbaud. Baud rate is the number of symbols that are transmitted per second. Till now, only InP technologies have the potential to reach >100 GHz speed. Scientists from the Imec-IDLab have developed a novel transceiver that has key building blocks fabricated in a mainstream SiGe BiCMOS process.

Peter Ossieur says, “The resulting IC decodes 4x 30Gbaud PAM-4 (or 4x 60Gb/s NRZ) streams, and simultaneously multiplexes and equalizes these streams into a 120Gbaud PAM-4 signal with >80GHz bandwidth, 1.2Vpp voltage swing and 2200mW power consumption. Since the 4-level pulse amplitude PAM-4 modulation format involves two bits per symbol (denoted as 00, 01, 10 and 11), this is the equivalent of a 240Gb/s (single lane) transmitter.”

The transmitter IC consists of a multiplexer which combines multiple low-speed input signals (coming from e.g. a CPU or GPU within the datacenter) into a single full-rate data stream. The stream of data is equalized to compensate for any bandwidth loss in the modulator or channel. This equalization is done mainly by applying digital signal processing techniques, and then converting it back to analog. Then this signal is used as an input signal for the driver that subsequently feeds the optical modulator.

In the prototype transmitter IC, four 30 Gbaud PAM-4 input signals are processed to obtain the two components of the PAM-4 signal, i.e., the most and least significant bit (MSB and LSB) signals. The four MSBs and LSBs are separately multiplexed and filtered. The signals are then combined in the output stage to obtain a full-rate 120GBaud PAM-4 signal. 

“The work shows a doubling of the operating rate compared to FinFET solutions and closely matches the speed and power obtained in InP-based solutions,” adds Peter Ossieur.

The work was presented at the 2021 Custom Integrated Circuits Conference (CICC).


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